Extending Boolean Methods for Scalable Logic Synthesis

Logic Synthesis for Disjunctions of Boolean Functions

This paper develops theoretical foundations and presents a practical algorithm for optimizing multi-output Boolean function M(x) whose outputs are combined using Boolean OR operator into a single-output Boolean function S(x). The proposed algorithm simplifies the logic structure of function M(x) and may change or remove some of its outputs, while preserving the functionality of function S(x). A...

Boolean Decomposition in Combinational Logic Synthesis

Today’s digital designs have reached a magnitude making it intractable for humans to develop designs on a gate level. Large designs are developed with help of hardware description languages like VHDL, or with other methods using high level of abstraction. Computer based synthesis tools are applied to transfer those descriptions to layouts for implementation in programmable circuits like Field P...

FPGA Logic Synthesis Using Quantified Boolean Satisfiability

This paper describes a novel Field Programmable Gate Array (FPGA) logic synthesis technique which determines if a logic function can be implemented in a given programmable circuit and describes how this problem can be formalized and solved using Quantified Boolean Satisfiability. This technique is general enough to be applied to any type of logic function and programmable circuit; thus, it has ...

combination of boolean logic and analytical hierarchy process methods for locating underground dam construction

constructionof underground dams is a practical solution to save groundwater in alluvium watersheds, particularly in arid and semi-arid regions where surface water scarcity is an environmental challenge. considering socio-economic and environmental benefits of underground dams, the accurate locating is the primary consideration for dam construction. the new technologies and methods are a step to...

Logic Re-Synthesis for FPGAs by SAT-based Boolean Matching